- By Tomas Bauer, Silex Microsystems (www.silexmicrosystems.com), Sweden -

First High Volume Via Process for Packaging and Integration of MEMS / CMOS

Silex Microsystems, a pure play MEMS foundry, offers a high density through silicon via technology that enables MEMS designs with siginificantly reduced form factor. The Through Silicon Via (TSV) process developed by Silex offers sub 50 μm pitch for through wafer connections in up to 600 μm thick substrates. Silex via process enables “all silicon” MEMS designs and true "Wafer Level Packaging" - features that are particularly important in consumer market applications.

The “via first” approach in this interconnect technology enables integration of interconnect functions in advanced sensors, actuators and microfluidic devices, as well as unrestricted integration of MEMS and CMOS. A significant number of Silex foundry customers are already integrating this standard process into their MEMS designs in order to solve interconnect and packaging issues inherent in the commercialization process of MEMS.

The high temperature formation process and “via first” approach also enables building CMOS sensors on top of via substrates, thereby facilitating the integration and interconnect of MEMS and CMOS.

1 INTRODUCTION AND BACKGROUND
Silex Microsystems offers MEMS foundry manufacturing services in its fully equipped 1500 m² clean room state-of-the-art 6" wafer fab. With a team of skilled MEMS experts, Silex helps its customers to quickly take their design concepts to working prototypes and the following volume manufacturing. Since the company was founded in year 2000, Silex has successfully completed well over 100 MEMS products with more than 75 customers around the globe.

Following the trend of the IC foundries, Silex is also continuously working on developing proprietary MEMS foundry processes, leveraging on intellectual property and know-how to complement the foundry manufacturing offer. One example of such MEMS process is this presented high density through wafer via technology that enables true wafer level packaging and MEMS designs with significantly reduced form factor.

Silex diversified market exposure, large customer base and clear strategy to not offer any own products to the market ensures Silex customers a solid and reliable long term MEMS supply.

2 TECHNOLOGY
In response to foundry customer demand for through silicon interconnect functionality; Silex engineers realized the idea to isolate a section of a low resistivity silicon wafer laterally by incorporating a trench filled with an isolating material. This isolating trench will most often have the shape of a square or a circle but could also take other shapes if necessary as long as it constitutes a closed loop.

The process begins with the formation of the trench using a DRIE process, achieving the necessary high aspect ratio features in up to 600 μm thick substrates. Typical trench width is in the order of 10 to 20 μm.

For details, click http://www.silexmicrosystems.com/docs/Sil-ViaWithZeroCrosstalkFeature-irstHighVolumeViaProcessForPackagingAndIntegrationOfMEMS&CMOS.pdf